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Microchip Technology /ATSAME70Q20 /PWM0 /ELMR[0]

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Interpret as ELMR[0]

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CSEL0)CSEL0 0 (CSEL1)CSEL1 0 (CSEL2)CSEL2 0 (CSEL3)CSEL3 0 (CSEL4)CSEL4 0 (CSEL5)CSEL5 0 (CSEL6)CSEL6 0 (CSEL7)CSEL7

Description

PWM Event Line 0 Mode Register 0

Fields

CSEL0

Comparison 0 Selection
CSEL1

Comparison 1 Selection
CSEL2

Comparison 2 Selection
CSEL3

Comparison 3 Selection
CSEL4

Comparison 4 Selection
CSEL5

Comparison 5 Selection
CSEL6

Comparison 6 Selection
CSEL7

Comparison 7 Selection

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data